This invention relates generally to semiconductor calibration wafers for inspecting critical dimensions (CD""s), and more particularly to the use of such wafers with scanning electron microscopes (SEM""s).
Since the invention of the integrated circuit (IC), semiconductor chip features have become exponentially smaller and the number of transistors per device exponentially larger. Advanced IC""s with hundreds of millions of transistors at feature sizes of 0.25 micron, 0.18 micron, and less are becoming routine. Improvement in overlay tolerances in photolithography, and the introduction of new light sources with progressively shorter wavelengths, have allowed optical steppers to significantly reduce the resolution limit for semiconductor fabrication far beyond one micron. To continue to make chip features smaller, and increase the transistor density of semiconductor devices, IC""s have begun to be manufactured that have features smaller than the lithographic wavelength.
Sub-wavelength lithography, however, places large burdens on lithographic processes. Resolution of anything smaller than a wavelength is generally quite difficult. Pattern fidelity can deteriorate dramatically in sub-wavelength lithography. The resulting semiconductor features may deviate significantly in size and shape from the ideal pattern drawn by the circuit designer. Critical dimensions (CD""s), which are the geometries and spacings used to monitor the pattern size and ensure that it is within the customer""s specification, are especially important to have size maintenance during processing. CD non-uniformity refers to when the designed and actual values do not match, or when the CD""s of multiple features on the same semiconductor device that should be identical are not. Ideally, CD non-uniformity is minimized, but in actuality such non-uniformity can measurably affect the resulting semiconductor device""s performance and operation.
CD scanning electron microscopes can be used (CD-SEM""s) for CD measurement and verification. Such CD measurement is referred to as CD-SEM measurement. An SEM varies from an optical microscope in many respects. The illumination source is an electron beam scanned over the wafer or device surface. The impinging electrons cause electrons on the surface to be ejected. These secondary electrons are collected and translated into a picture of the surface, on either a screen or a photograph. An SEM needs the wafer and the beam to be in a vacuum. The electron beam has a smaller wavelength than white light, and allows the resolution of surface detail down to sub-micrometer levels. Depth of field problems are non-existent, because every plane on the surface is in focus. Magnification is very high. A tilting wafer holder in an SEM allows the viewing of the surface at angles, which enhances three-dimensional perspectives.
For a CD-SEM, the SEM typically measures a calibration wafer, which is commonly referred to as a CD-SEM calibration wafer, or an SEM-CD calibration wafer. FIG. 1 shows an example of such a wafer 100. The calibration wafer 100 has an oxide layer 102, on which a polysilicon layer 104 has been deposited and etched, so that it has the desired CD, as the width 106. Therefore, measuring the width 106 and comparing it to the desired width allows for the CD to be monitored.
Unfortunately, the oxide layer 102 and the polysilicon layer 104 do not have good conductivity. Over time, measurements of the wafer 100 by an SEM will result in electrons ejected by the SEM to remain on the surface of the wafer, which is known and referred to as the charge effect, or the charging effect. FIG. 2 shows the wafer 100 as the wafer 100xe2x80x2, in which electrons 202 remain on the surface of the wafer. Because of the excess electrons 202, after the wafer 100 has been measured a number of times by an SEM, the width of the CD width 106 will be erroneously measured as the width 106xe2x80x2. That is, each time the wafer 100 is measured, more electrons 202 remain on the surface of the wafer, causing the width 106 to increase as the width 106xe2x80x2. From the first time to the twentieth time the width 106 is measured, the measurement may increase from 0.174 micron to 0.181 micron, for example.
To overcome this problem, the currently accepted approach is to measure CD pitch instead of CD width, where a number of CD""s are spaced evenly across the wafer surface. By measuring the pitch between CD widths, and then correlating the pitch measured with CD width, the charge effect problem can be overcome in some situations. For instance, FIG. 3 shows a wafer 300 in which polysilicon lines 304a, 304b, and 304c are deposited and etched on an oxide layer 302. Rather than measuring the width of one or more of these lines, the CD-SEM instead measures the pitch between the lines, such as the pitch 306a and/or the pitch 306b. The electrons 308 remaining on the surface of the oxide layer 302 do not affect pitch measurement.
However, measuring CD pitch instead of CD width directly has disadvantages. The correlation of CD to pitch may be difficult to accomplish, resulting in less than desirable accuracy of the resulting CD inference. Furthermore, some semiconductor devices have CD""s that cannot be represented easily as a series of spaced CD""s on a calibration wafer. For such devices, the indirect measurement of CD width via CD pitch is not possible.
Therefore, there is a need for measuring CD""s that overcomes these disadvantages. More specifically, there is a need for measuring CD""s with an SEM that overcomes these disadvantages. Such measurement should not be vulnerable to the charge effect that has been described. However, such CD measurement should also not be performed indirectly via CD pitch measurement. For these and other reasons, there is a need for the present invention.
The invention relates to a semiconductor calibration wafer that has no charge effect. The calibration wafer has a substrate layer and a conductive metal layer. The conductive metal layer completely covers the substrate layer, and has a critical dimension (CD) bar corresponding to a desired CD. The substrate layer may be an oxide layer or another type of substrate layer, whereas the conductive metal layer may be an aluminum layer, a copper layer, or another type of conductive metal layer. Where the calibration wafer is used in conjunction with a scanning electron microscope (SEM) to monitor the CD, the electrons ejected by the SEM do not remain on the semiconductor calibration wafer, but instead are carried away via the conductive metal layer. Thus, the calibration wafer is not vulnerable to the charge effect.
Embodiments of the invention provide for advantages over the prior art. Because the semiconductor calibration wafer is not vulnerable to the charge effect, the CD can be measured directly as the CD bar within the conductive metal layer, which is also referred to as the CD line or CD area within the conductive metal layer in an interchangeable manner. That is, the CD does not have to be measured indirectly via CD pitch. Furthermore, as the SEM is used a number of times to measure the CD, no electrons remain on the surface of the wafer that can skew measurements. Instead, the electrons are carried away via the conductive metal layer that completely covers the substrate layer. Still other advantages, aspects, and embodiments of the invention will become apparent by reading the detailed description that follows, and by referring to the accompanying drawings.